Welcome to icestudio’s documentation!¶

Contents¶

GUI¶

Source code: https://github.com/fpgawars/icestudio

Menu¶

File¶

New project: create a new project.
Open project: show a file dialog to open a project (.ice).
Examples: contains all stored examples. A example is loaded as a project.
Templates: contains all stored templates. A template is loaded as a project.
Save: save the current project (.ice).
Save as: show a save file dialog to save the current project (.ice).
Import block: load a block file (.iceb) into the current project.
Export as block: show a save file dialog to export the current project as a block file (.iceb).
Export verilog: show a save file dialog to export the current verilog code file (.v).
Export PCF: show a save file dialog to export the current pcf file (.pcf).

Note

When a project is exported as a block, all FPGA I/O information is removed.

Hint

Examples are stored in app/resources/examples. To create a new examples category just create a directory there. To create a new example copy and paste a .ice file.

Edit¶

Image path: set the project’s relative image path. This image will be shown in the exported block. For example, a valid value can be: ‘resources/images/and.svg’.
Language: select the application language: English, Spanish. This selection is stored in the app profile.
Clear all: remove all blocks and wires from the graph.
Clone selected: clone the selected block. It can also be done with Ctrl + c key.
Remove selected: remove the selected block. It can also be done with Ctrl + x and Supr keys.

View¶

Reset view: reset pan and zoom to its default values.

Boards¶

It contains the supported boards: Icezum, iCEstick, Go board. When a board is selected all I/O block combos are updated and its current values removed.

Hint

This information is stored in the app/scripts/services/boards.service.js file. To support a new board just add its information to this file.

Tools¶

Verify: check the generated verilog source code.
Build: generate the bitstream from the graphic source.
Upload: generate and upload the bitstream to the FPGA board.
Install/Upgrade toolchain: install a python virtualenv in .icestudio/venv, apio and icestorm toolchain. It requires Python 2.7 installed and Internet connection.
Remove toolchain: remove the directories .icestudio and .apio.

Hint

Generated files are stored in _build directory.

Help¶

View license: open the Icestudio’s license in a web browser.
Version: show the current version.
Documentation: open the Icestudio’s documentation in a web browser.
Source code: open the Icestudio’s source code in a web browser.
Community forum: open the FPGAwars forum in a web browser.
About Icestudio: information about the application.

Blocks menu¶

Basic¶

It contains the basic blocks:

code: code block. Ports are asked in a prompt dialog.
input: input block. Block name is asked in a prompt dialog.
output: output block. Block name is asked in a prompt dialog.

Note

Multiple input and output blocks can be created using the space separator. For example: x y z will create 3 blocks with those names. FPGA I/O ports values are set in the block combo box. These values can be set by searching and also unset by doing click on the cross. Double click over input and output blocks allows to modify the block name. In code block ports definition, input and output ports are separated by a space. Port names are separated by ,. For example: a,b: input a and b, a,b c: input a and b, output c. Double click over code blocks allows to modify its input and output ports.

Stored blocks¶

It contains all stored blocks sorted by categories. These menu is generated when the application starts.

Hint

Examples are stored in app/resources/blocks. To create a new block category just create a directory there. To create a new block copy and paste a .iceb file.

Graph¶

This is the main panel. It contains the blocks and the wires.

Pan & Zoom¶

Pan is performed using the mouse left button over the background. Zoom is performed using mouse wheel. Both values can be reset in View > Reset view.

Select¶

Block selection is performed using the mouse right button. Blocks can be selected/unselected individually using right-click/Ctrl+right-click, respectively. In addition, several blocks can be selected by a selection box. Selection is cancelled when the background is clicked.

Blocks examination¶

Non-basic blocks can be readonly examined by double clicking the block using the mouse left button. This is a recursive action.

Note

The examination path is stored in the breadcrumbs. This allows you to go back to any previous block.

How to...¶

Create a project¶

Create a new project

Go to Edit > New project, write your project’s name and press OK.

Add your blocks

Code blocks

Click on basic > code, add the code ports. Input and output ports are separated by a space. Port names are separated by a comma. E.g.: a,b c.

This block contains a text editor to write your module verilog code. Module header and footer are not required.

Info blocks

Click on basic > info.

This block contains a text editor to add comments about the project.

Input/Output blocks

Click on basic > input or basic > output, write the block’s name and press OK.

These blocks contain a FPGA pin selector depending on the selected board.

Bit blocks

Click on bit > 0 or bit > 1.

These blocks are low and high logic drivers.

Config block

Click on config > Input-config.

This block must be connected to input ports in order to configure a pull up.

Logic blocks

Go to the logic menu and select a logic gate.

Connect your blocks

Select your board

Go to Boards menu and select Icezum, iCEstick or Go board.

Set FPGA I/O pins

Select all Input/Output blocks’ pins.

Save the project

Go to Edit > Save:

It will be saved as an .ice file.

Upload a bitstream¶

Open a project

Go to Edit > Open project and select an .ice file.
Verify the project

Go to Tools > Verify.

This option checks the generated verilog code using apio verify.
Build the project

Go to Tools > Build.

This option generates a bitstream using apio build.
Upload the project

Connect your FPGA board and press Tools > Upload. This option uses apio upload.

Note

If the FPGA toolchain is not installed, it will be installed automatically when any tool is pressed. It can also be installed or removed in the menu Tools section.

Create a block¶

Open a project

Go to Edit > Open project and select an .ice file.

Verify the project

Go to Tools > Verify.

Export the project as a block

Go to Edit > Export as block.

It will be saved as an .iceb file.

Note

Input/Output blocks will become new Block I/O pins.

Use a custom block¶

Open or create a new project

Import the custom block

Go to Edit > Import block and select an .iceb file.
Examine the custom block

Complex blocks can be examined by double clicking the block.

Include a list file¶

If your code block contains a list file(s), for example:

$readmemh("rom.list", rom);

Save the ice project
Copy the list file(s) in the project directory
Build and upload the project

Blocks¶

Definitions¶

Block¶

A block is an entity with input and output ports composed by blocks.

Its input and output ports are defined from its input and output block instances.

Extension: .iceb

{
  "graph": {
    "blocks" : [],
    "wires": []
  },
  "deps" : {},
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  }
}

Block instances¶

{
  "id": "",
  "type": "",
  "data": {},
  "position": {
    "x": 0,
    "y": 0
  }
}

Wire instances¶

{
  "source": {
    "block": "",
    "port": ""
  },
  "target": {
    "block": "",
    "port": ""
  },
  "vertices": [
     {
       "x": 0,
       "y": 0
     }
  ]
}

Basic blocks¶

Input instance¶

This special block is used to define input blocks in a project. It has one output port named ‘out’.

{
  "id": "",
  "type": "basic.input",
  "data": {
    "label": "a"
  },
  "position": {
    "x": 0,
    "y": 0
  }
}

Output instance¶

This special block is used to define output blocks in a projects. It has one input port named ‘in’.

{
  "id": "",
  "type": "basic.output",
  "data": {
    "label": "o"
  },
  "position": {
    "x": 0,
    "y": 0
  }
}

Code instance¶

This special block is used to define verilog code in a block. It has input and output ports defined in value.ports field.

{
  "id": "",
  "type": "basic.code",
  "data": {
    "code": "// And gate\n\nassign o = a & b;\n",
    "ports": {
      "in": [
        "a",
        "b"
       ],
       "out": [
         "o"
       ]
     }
  },
  "position": {
    "x": 0,
    "y": 0
  }
}

Simple blocks¶

Simple blocks contain only basic blocks. It has no dependencies.

Low block¶

File: low.iceb

{
  "graph": {
    "blocks": [
      {
        "id": "b959fb96-ac67-4aea-90b3-ed35a4c17bf5",
        "type": "basic.code",
        "data": {
          "code": "// Bit 0\n\nassign v = 1'b0;",
          "ports": {
            "in": [],
            "out": [
              "v"
            ]
          }
        },
        "position": {
          "x": 96,
          "y": 96
        }
      },
      {
        "id": "19c8f68d-5022-487f-9ab0-f0a3cd58bead",
        "type": "basic.output",
        "data": {
          "label": "o"
        },
        "position": {
          "x": 608,
          "y": 192
        }
      }
    ],
    "wires": [
      {
        "source": {
          "block": "b959fb96-ac67-4aea-90b3-ed35a4c17bf5",
          "port": "v"
        },
        "target": {
          "block": "19c8f68d-5022-487f-9ab0-f0a3cd58bead",
          "port": "in"
        }
      }
    ]
  },
  "deps": {},
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  }
}

Not block¶

File: not.iceb

{
  "graph": {
    "blocks": [
      {
        "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
        "type": "basic.input",
        "data": {
          "label": "x"
        },
        "position": {
          "x": 64,
          "y": 144
        }
      },
      {
        "id": "664caf9e-5f40-4df4-800a-b626af702e62",
        "type": "basic.output",
        "data": {
          "label": "y"
        },
        "position": {
          "x": 752,
          "y": 144
        }
      },
      {
        "id": "5365ed8c-e5db-4445-938f-8d689830ea5c",
        "type": "basic.code",
        "data": {
          "code": "// NOT logic gate\n\nassign c = ! a;",
          "ports": {
            "in": [
              "a"
            ],
            "out": [
              "c"
            ]
          }
        },
        "position": {
          "x": 256,
          "y": 48
        }
      }
    ],
    "wires": [
      {
        "source": {
          "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
          "port": "out"
        },
        "target": {
          "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
          "port": "a"
        }
      },
      {
        "source": {
          "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
          "port": "c"
        },
        "target": {
          "block": "664caf9e-5f40-4df4-800a-b626af702e62",
          "port": "in"
        }
      }
    ]
  },
  "deps": {},
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  }
}

Or block¶

File: or.iceb

{
  "graph": {
    "blocks": [
      {
        "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
        "type": "basic.input",
        "data": {
          "label": "x"
        },
        "position": {
          "x": 64,
          "y": 80
        }
      },
      {
        "id": "97b51945-d716-4b6c-9db9-970d08541249",
        "type": "basic.input",
        "data": {
          "label": "y"
        },
        "position": {
          "x": 64,
          "y": 208
        }
      },
      {
        "id": "664caf9e-5f40-4df4-800a-b626af702e62",
        "type": "basic.output",
        "data": {
          "label": "o"
        },
        "position": {
          "x": 752,
          "y": 144
        }
      },
      {
        "id": "00925b04-5004-4307-a737-fa4e97c8b6ab",
        "type": "basic.code",
        "data": {
          "code": "// OR logic gate\n\nassign c = a | b;",
          "ports": {
            "in": [
              "a",
              "b"
            ],
            "out": [
              "c"
            ]
          }
        },
        "position": {
          "x": 256,
          "y": 48
        }
      }
    ],
    "wires": [
      {
        "source": {
          "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
          "port": "out"
        },
        "target": {
          "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
          "port": "a"
        }
      },
      {
        "source": {
          "block": "97b51945-d716-4b6c-9db9-970d08541249",
          "port": "out"
        },
        "target": {
          "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
          "port": "b"
        }
      },
      {
        "source": {
          "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
          "port": "c"
        },
        "target": {
          "block": "664caf9e-5f40-4df4-800a-b626af702e62",
          "port": "in"
        }
      }
    ]
  },
  "deps": {},
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  }
}

Complex blocks¶

Complex blocks contain not only basic blocks.

Cnot block¶

File: cnot.iceb

{
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  },
  "graph": {
    "blocks": [
      {
        "id": "db6b84db-bc29-46d6-86a4-f48cc50c8076",
        "type": "not",
        "data": {},
        "position": {
          "x": 280,
          "y": 248
        }
      },
      {
        "id": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
        "type": "or",
        "data": {},
        "position": {
          "x": 464,
          "y": 136
        }
      },
      {
        "id": "55c6c056-3630-4482-ad47-f4d9ee83b835",
        "type": "basic.input",
        "data": {
          "label": "a"
        },
        "position": {
          "x": 88,
          "y": 248
        }
      },
      {
        "id": "c8c6eed3-548c-49c7-a162-282179d427b1",
        "type": "basic.output",
        "data": {
          "label": "b"
        },
        "position": {
          "x": 640,
          "y": 136
        }
      },
      {
        "id": "d2a2eac1-f8b0-4e5b-a693-626f6d14b8e5",
        "type": "low",
        "data": {},
        "position": {
          "x": 280,
          "y": 120
        }
      }
    ],
    "wires": [
      {
        "source": {
          "block": "d2a2eac1-f8b0-4e5b-a693-626f6d14b8e5",
          "port": "19c8f68d-5022-487f-9ab0-f0a3cd58bead"
        },
        "target": {
          "block": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
          "port": "18c2ebc7-5152-439c-9b3f-851c59bac834"
        }
      },
      {
        "source": {
          "block": "55c6c056-3630-4482-ad47-f4d9ee83b835",
          "port": "out"
        },
        "target": {
          "block": "db6b84db-bc29-46d6-86a4-f48cc50c8076",
          "port": "18c2ebc7-5152-439c-9b3f-851c59bac834"
        }
      },
      {
        "source": {
          "block": "db6b84db-bc29-46d6-86a4-f48cc50c8076",
          "port": "664caf9e-5f40-4df4-800a-b626af702e62"
        },
        "target": {
          "block": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
          "port": "97b51945-d716-4b6c-9db9-970d08541249"
        }
      },
      {
        "source": {
          "block": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
          "port": "664caf9e-5f40-4df4-800a-b626af702e62"
        },
        "target": {
          "block": "c8c6eed3-548c-49c7-a162-282179d427b1",
          "port": "in"
        }
      }
    ]
  },
  "deps": {
    "or": {
      "graph": {
        "blocks": [
          {
            "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
            "type": "basic.input",
            "data": {
              "label": "x"
            },
            "position": {
              "x": 64,
              "y": 80
            }
          },
          {
            "id": "97b51945-d716-4b6c-9db9-970d08541249",
            "type": "basic.input",
            "data": {
              "label": "y"
            },
            "position": {
              "x": 64,
              "y": 208
            }
          },
          {
            "id": "664caf9e-5f40-4df4-800a-b626af702e62",
            "type": "basic.output",
            "data": {
              "label": "o"
            },
            "position": {
              "x": 752,
              "y": 144
            }
          },
          {
            "id": "00925b04-5004-4307-a737-fa4e97c8b6ab",
            "type": "basic.code",
            "data": {
              "code": "// OR logic gate\n\nassign c = a | b;",
              "ports": {
                "in": [
                  "a",
                  "b"
                ],
                "out": [
                  "c"
                ]
              }
            },
            "position": {
              "x": 256,
              "y": 48
            }
          }
        ],
        "wires": [
          {
            "source": {
              "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
              "port": "out"
            },
            "target": {
              "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
              "port": "a"
            }
          },
          {
            "source": {
              "block": "97b51945-d716-4b6c-9db9-970d08541249",
              "port": "out"
            },
            "target": {
              "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
              "port": "b"
            }
          },
          {
            "source": {
              "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
              "port": "c"
            },
            "target": {
              "block": "664caf9e-5f40-4df4-800a-b626af702e62",
              "port": "in"
            }
          }
        ]
      },
      "deps": {},
      "image": "",
      "state": {
        "pan": {
          "x": 0,
          "y": 0
        },
        "zoom": 1
      }
    },
    "not": {
      "graph": {
        "blocks": [
          {
            "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
            "type": "basic.input",
            "data": {
              "label": "x"
            },
            "position": {
              "x": 64,
              "y": 144
            }
          },
          {
            "id": "664caf9e-5f40-4df4-800a-b626af702e62",
            "type": "basic.output",
            "data": {
              "label": "y"
            },
            "position": {
              "x": 752,
              "y": 144
            }
          },
          {
            "id": "5365ed8c-e5db-4445-938f-8d689830ea5c",
            "type": "basic.code",
            "data": {
              "code": "// NOT logic gate\n\nassign c = ! a;",
              "ports": {
                "in": [
                  "a"
                ],
                "out": [
                  "c"
                ]
              }
            },
            "position": {
              "x": 256,
              "y": 48
            }
          }
        ],
        "wires": [
          {
            "source": {
              "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
              "port": "out"
            },
            "target": {
              "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
              "port": "a"
            }
          },
          {
            "source": {
              "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
              "port": "c"
            },
            "target": {
              "block": "664caf9e-5f40-4df4-800a-b626af702e62",
              "port": "in"
            }
          }
        ]
      },
      "deps": {},
      "image": "",
      "state": {
        "pan": {
          "x": 0,
          "y": 0
        },
        "zoom": 1
      }
    },
    "low": {
      "graph": {
        "blocks": [
          {
            "id": "b959fb96-ac67-4aea-90b3-ed35a4c17bf5",
            "type": "basic.code",
            "data": {
              "code": "// Bit 0\n\nassign v = 1'b0;",
              "ports": {
                "in": [],
                "out": [
                  "v"
                ]
              }
            },
            "position": {
              "x": 96,
              "y": 96
            }
          },
          {
            "id": "19c8f68d-5022-487f-9ab0-f0a3cd58bead",
            "type": "basic.output",
            "data": {
              "label": "o"
            },
            "position": {
              "x": 608,
              "y": 192
            }
          }
        ],
        "wires": [
          {
            "source": {
              "block": "b959fb96-ac67-4aea-90b3-ed35a4c17bf5",
              "port": "v"
            },
            "target": {
              "block": "19c8f68d-5022-487f-9ab0-f0a3cd58bead",
              "port": "in"
            }
          }
        ]
      },
      "deps": {},
      "image": "",
      "state": {
        "pan": {
          "x": 0,
          "y": 0
        },
        "zoom": 1
      }
    }
  }
}

Dnot block¶

File: dnot.iceb

{
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  },
  "graph": {
    "blocks": [
      {
        "id": "327f1a9e-ba42-4d25-adcd-f7f16ac8f451",
        "type": "basic.input",
        "data": {
          "label": "button"
        },
        "position": {
          "x": 104,
          "y": 176
        }
      },
      {
        "id": "58c892ba-89a3-4da7-9d0a-56f2523bfd98",
        "type": "cnot",
        "data": {},
        "position": {
          "x": 352,
          "y": 240
        }
      },
      {
        "id": "88b3c210-c6f5-4cd3-a578-2e5ab8aa1562",
        "type": "not",
        "data": {},
        "position": {
          "x": 352,
          "y": 112
        }
      },
      {
        "id": "4c4d2ddd-a97d-4fcb-9c68-ba1149f25082",
        "type": "basic.output",
        "data": {
          "label": "led0"
        },
        "position": {
          "x": 552,
          "y": 112
        }
      },
      {
        "id": "0e777320-de37-4dca-a077-51fbf10a6565",
        "type": "basic.output",
        "data": {
          "label": "led1"
        },
        "position": {
          "x": 552,
          "y": 240
        }
      }
    ],
    "wires": [
      {
        "source": {
          "block": "327f1a9e-ba42-4d25-adcd-f7f16ac8f451",
          "port": "out"
        },
        "target": {
          "block": "88b3c210-c6f5-4cd3-a578-2e5ab8aa1562",
          "port": "18c2ebc7-5152-439c-9b3f-851c59bac834"
        }
      },
      {
        "source": {
          "block": "327f1a9e-ba42-4d25-adcd-f7f16ac8f451",
          "port": "out"
        },
        "target": {
          "block": "58c892ba-89a3-4da7-9d0a-56f2523bfd98",
          "port": "55c6c056-3630-4482-ad47-f4d9ee83b835"
        }
      },
      {
        "source": {
          "block": "88b3c210-c6f5-4cd3-a578-2e5ab8aa1562",
          "port": "664caf9e-5f40-4df4-800a-b626af702e62"
        },
        "target": {
          "block": "4c4d2ddd-a97d-4fcb-9c68-ba1149f25082",
          "port": "in"
        }
      },
      {
        "source": {
          "block": "58c892ba-89a3-4da7-9d0a-56f2523bfd98",
          "port": "c8c6eed3-548c-49c7-a162-282179d427b1"
        },
        "target": {
          "block": "0e777320-de37-4dca-a077-51fbf10a6565",
          "port": "in"
        }
      }
    ]
  },
  "deps": {
    "logic.not": {
      "graph": {
        "blocks": [
          {
            "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
            "type": "basic.input",
            "data": {
              "label": ""
            },
            "position": {
              "x": 64,
              "y": 144
            }
          },
          {
            "id": "664caf9e-5f40-4df4-800a-b626af702e62",
            "type": "basic.output",
            "data": {
              "label": ""
            },
            "position": {
              "x": 752,
              "y": 144
            }
          },
          {
            "id": "5365ed8c-e5db-4445-938f-8d689830ea5c",
            "type": "basic.code",
            "data": {
              "code": "// NOT logic gate\n\nassign c = ~ a;",
              "ports": {
                "in": [
                  "a"
                ],
                "out": [
                  "c"
                ]
              }
            },
            "position": {
              "x": 256,
              "y": 48
            }
          }
        ],
        "wires": [
          {
            "source": {
              "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
              "port": "out"
            },
            "target": {
              "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
              "port": "a"
            }
          },
          {
            "source": {
              "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
              "port": "c"
            },
            "target": {
              "block": "664caf9e-5f40-4df4-800a-b626af702e62",
              "port": "in"
            }
          }
        ]
      },
      "deps": {},
      "image": "resources/images/not.svg",
      "state": {
        "pan": {
          "x": 0,
          "y": 0
        },
        "zoom": 1
      }
    },
    "cnot": {
      "image": "",
      "state": {
        "pan": {
          "x": 0,
          "y": 0
        },
        "zoom": 1
      },
      "graph": {
        "blocks": [
          {
            "id": "db6b84db-bc29-46d6-86a4-f48cc50c8076",
            "type": "not",
            "data": {},
            "position": {
              "x": 280,
              "y": 248
            }
          },
          {
            "id": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
            "type": "or",
            "data": {},
            "position": {
              "x": 464,
              "y": 136
            }
          },
          {
            "id": "55c6c056-3630-4482-ad47-f4d9ee83b835",
            "type": "basic.input",
            "data": {
              "label": "a"
            },
            "position": {
              "x": 88,
              "y": 248
            }
          },
          {
            "id": "c8c6eed3-548c-49c7-a162-282179d427b1",
            "type": "basic.output",
            "data": {
              "label": "b"
            },
            "position": {
              "x": 640,
              "y": 136
            }
          },
          {
            "id": "d2a2eac1-f8b0-4e5b-a693-626f6d14b8e5",
            "type": "low",
            "data": {},
            "position": {
              "x": 280,
              "y": 120
            }
          }
        ],
        "wires": [
          {
            "source": {
              "block": "d2a2eac1-f8b0-4e5b-a693-626f6d14b8e5",
              "port": "19c8f68d-5022-487f-9ab0-f0a3cd58bead"
            },
            "target": {
              "block": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
              "port": "18c2ebc7-5152-439c-9b3f-851c59bac834"
            }
          },
          {
            "source": {
              "block": "55c6c056-3630-4482-ad47-f4d9ee83b835",
              "port": "out"
            },
            "target": {
              "block": "db6b84db-bc29-46d6-86a4-f48cc50c8076",
              "port": "18c2ebc7-5152-439c-9b3f-851c59bac834"
            }
          },
          {
            "source": {
              "block": "db6b84db-bc29-46d6-86a4-f48cc50c8076",
              "port": "664caf9e-5f40-4df4-800a-b626af702e62"
            },
            "target": {
              "block": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
              "port": "97b51945-d716-4b6c-9db9-970d08541249"
            }
          },
          {
            "source": {
              "block": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
              "port": "664caf9e-5f40-4df4-800a-b626af702e62"
            },
            "target": {
              "block": "c8c6eed3-548c-49c7-a162-282179d427b1",
              "port": "in"
            }
          }
        ]
      },
      "deps": {
        "or": {
          "graph": {
            "blocks": [
              {
                "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
                "type": "basic.input",
                "data": {
                  "label": "x"
                },
                "position": {
                  "x": 64,
                  "y": 80
                }
              },
              {
                "id": "97b51945-d716-4b6c-9db9-970d08541249",
                "type": "basic.input",
                "data": {
                  "label": "y"
                },
                "position": {
                  "x": 64,
                  "y": 208
                }
              },
              {
                "id": "664caf9e-5f40-4df4-800a-b626af702e62",
                "type": "basic.output",
                "data": {
                  "label": "o"
                },
                "position": {
                  "x": 752,
                  "y": 144
                }
              },
              {
                "id": "00925b04-5004-4307-a737-fa4e97c8b6ab",
                "type": "basic.code",
                "data": {
                  "code": "// OR logic gate\n\nassign c = a | b;",
                  "ports": {
                    "in": [
                      "a",
                      "b"
                    ],
                    "out": [
                      "c"
                    ]
                  }
                },
                "position": {
                  "x": 256,
                  "y": 48
                }
              }
            ],
            "wires": [
              {
                "source": {
                  "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
                  "port": "out"
                },
                "target": {
                  "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
                  "port": "a"
                }
              },
              {
                "source": {
                  "block": "97b51945-d716-4b6c-9db9-970d08541249",
                  "port": "out"
                },
                "target": {
                  "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
                  "port": "b"
                }
              },
              {
                "source": {
                  "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
                  "port": "c"
                },
                "target": {
                  "block": "664caf9e-5f40-4df4-800a-b626af702e62",
                  "port": "in"
                }
              }
            ]
          },
          "deps": {},
          "image": "",
          "state": {
            "pan": {
              "x": 0,
              "y": 0
            },
            "zoom": 1
          }
        },
        "not": {
          "graph": {
            "blocks": [
              {
                "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
                "type": "basic.input",
                "data": {
                  "label": "x"
                },
                "position": {
                  "x": 64,
                  "y": 144
                }
              },
              {
                "id": "664caf9e-5f40-4df4-800a-b626af702e62",
                "type": "basic.output",
                "data": {
                  "label": "y"
                },
                "position": {
                  "x": 752,
                  "y": 144
                }
              },
              {
                "id": "5365ed8c-e5db-4445-938f-8d689830ea5c",
                "type": "basic.code",
                "data": {
                  "code": "// NOT logic gate\n\nassign c = ! a;",
                  "ports": {
                    "in": [
                      "a"
                    ],
                    "out": [
                      "c"
                    ]
                  }
                },
                "position": {
                  "x": 256,
                  "y": 48
                }
              }
            ],
            "wires": [
              {
                "source": {
                  "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
                  "port": "out"
                },
                "target": {
                  "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
                  "port": "a"
                }
              },
              {
                "source": {
                  "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
                  "port": "c"
                },
                "target": {
                  "block": "664caf9e-5f40-4df4-800a-b626af702e62",
                  "port": "in"
                }
              }
            ]
          },
          "deps": {},
          "image": "",
          "state": {
            "pan": {
              "x": 0,
              "y": 0
            },
            "zoom": 1
          }
        },
        "low": {
          "graph": {
            "blocks": [
              {
                "id": "b959fb96-ac67-4aea-90b3-ed35a4c17bf5",
                "type": "basic.code",
                "data": {
                  "code": "// Bit 0\n\nassign v = 1'b0;",
                  "ports": {
                    "in": [],
                    "out": [
                      "v"
                    ]
                  }
                },
                "position": {
                  "x": 96,
                  "y": 96
                }
              },
              {
                "id": "19c8f68d-5022-487f-9ab0-f0a3cd58bead",
                "type": "basic.output",
                "data": {
                  "label": "o"
                },
                "position": {
                  "x": 608,
                  "y": 192
                }
              }
            ],
            "wires": [
              {
                "source": {
                  "block": "b959fb96-ac67-4aea-90b3-ed35a4c17bf5",
                  "port": "v"
                },
                "target": {
                  "block": "19c8f68d-5022-487f-9ab0-f0a3cd58bead",
                  "port": "in"
                }
              }
            ]
          },
          "deps": {},
          "image": "",
          "state": {
            "pan": {
              "x": 0,
              "y": 0
            },
            "zoom": 1
          }
        }
      }
    },
    "not": {
      "graph": {
        "blocks": [
          {
            "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
            "type": "basic.input",
            "data": {
              "label": "x"
            },
            "position": {
              "x": 64,
              "y": 144
            }
          },
          {
            "id": "664caf9e-5f40-4df4-800a-b626af702e62",
            "type": "basic.output",
            "data": {
              "label": "y"
            },
            "position": {
              "x": 752,
              "y": 144
            }
          },
          {
            "id": "5365ed8c-e5db-4445-938f-8d689830ea5c",
            "type": "basic.code",
            "data": {
              "code": "// NOT logic gate\n\nassign c = ! a;",
              "ports": {
                "in": [
                  "a"
                ],
                "out": [
                  "c"
                ]
              }
            },
            "position": {
              "x": 256,
              "y": 48
            }
          }
        ],
        "wires": [
          {
            "source": {
              "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
              "port": "out"
            },
            "target": {
              "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
              "port": "a"
            }
          },
          {
            "source": {
              "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
              "port": "c"
            },
            "target": {
              "block": "664caf9e-5f40-4df4-800a-b626af702e62",
              "port": "in"
            }
          }
        ]
      },
      "deps": {},
      "image": "",
      "state": {
        "pan": {
          "x": 0,
          "y": 0
        },
        "zoom": 1
      }
    }
  }
}

Project¶

Definition¶

A project is a composition of blocks. It includes the FPGA board information.

Its input and output block instances have also the FPGA I/O values to allow the synthesis.

It can be exported as a block, by removing the FPGA board and I/O data.

Extension: .ice

{
  "board": "",
  "graph": {
    "blocks" : [],
    "wires": []
  },
  "deps" : {},
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  }
}

Examples¶

Low project¶

File: low.ice

{
  "board": "icezum",
  "graph": {
    "blocks": [
      {
        "id": "b959fb96-ac67-4aea-90b3-ed35a4c17bf5",
        "type": "basic.code",
        "data": {
          "code": "// Bit 0\n\nassign v = 1'b0;",
          "ports": {
            "in": [],
            "out": [
              "v"
            ]
          }
        },
        "position": {
          "x": 96,
          "y": 96
        }
      },
      {
        "id": "19c8f68d-5022-487f-9ab0-f0a3cd58bead",
        "type": "basic.output",
        "data": {
          "label": "o",
          "pin": {
            "name": "LED0",
            "value": "95"
          }
        },
        "position": {
          "x": 608,
          "y": 192
        }
      }
    ],
    "wires": [
      {
        "source": {
          "block": "b959fb96-ac67-4aea-90b3-ed35a4c17bf5",
          "port": "v"
        },
        "target": {
          "block": "19c8f68d-5022-487f-9ab0-f0a3cd58bead",
          "port": "in"
        }
      }
    ]
  },
  "deps": {},
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  }
}

Not project¶

File: not.ice

{
  "board": "icezum",
  "graph": {
    "blocks": [
      {
        "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
        "type": "basic.input",
        "data": {
          "label": "x",
          "pin": {
            "name": "SW1",
            "value": "10"
          }
        },
        "position": {
          "x": 64,
          "y": 144
        }
      },
      {
        "id": "664caf9e-5f40-4df4-800a-b626af702e62",
        "type": "basic.output",
        "data": {
          "label": "y",
          "pin": {
            "name": "LED0",
            "value": "95"
          }
        },
        "position": {
          "x": 752,
          "y": 144
        }
      },
      {
        "id": "5365ed8c-e5db-4445-938f-8d689830ea5c",
        "type": "basic.code",
        "data": {
          "code": "// NOT logic gate\n\nassign c = ! a;",
          "ports": {
            "in": [
              "a"
            ],
            "out": [
              "c"
            ]
          }
        },
        "position": {
          "x": 256,
          "y": 48
        }
      }
    ],
    "wires": [
      {
        "source": {
          "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
          "port": "out"
        },
        "target": {
          "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
          "port": "a"
        }
      },
      {
        "source": {
          "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
          "port": "c"
        },
        "target": {
          "block": "664caf9e-5f40-4df4-800a-b626af702e62",
          "port": "in"
        }
      }
    ]
  },
  "deps": {},
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  }
}

Or project¶

File: or.ice

{
  "board": "icezum",
  "graph": {
    "blocks": [
      {
        "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
        "type": "basic.input",
        "data": {
          "label": "x",
          "pin": {
            "name": "SW1",
            "value": "10"
          }
        },
        "position": {
          "x": 64,
          "y": 80
        }
      },
      {
        "id": "97b51945-d716-4b6c-9db9-970d08541249",
        "type": "basic.input",
        "data": {
          "label": "y",
          "pin": {
            "name": "SW2",
            "value": "11"
          }
        },
        "position": {
          "x": 64,
          "y": 208
        }
      },
      {
        "id": "664caf9e-5f40-4df4-800a-b626af702e62",
        "type": "basic.output",
        "data": {
          "label": "o",
          "pin": {
            "name": "LED0",
            "value": "95"
          }
        },
        "position": {
          "x": 752,
          "y": 144
        }
      },
      {
        "id": "00925b04-5004-4307-a737-fa4e97c8b6ab",
        "type": "basic.code",
        "data": {
          "code": "// OR logic gate\n\nassign c = a | b;",
          "ports": {
            "in": [
              "a",
              "b"
            ],
            "out": [
              "c"
            ]
          }
        },
        "position": {
          "x": 256,
          "y": 48
        }
      }
    ],
    "wires": [
      {
        "source": {
          "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
          "port": "out"
        },
        "target": {
          "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
          "port": "a"
        }
      },
      {
        "source": {
          "block": "97b51945-d716-4b6c-9db9-970d08541249",
          "port": "out"
        },
        "target": {
          "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
          "port": "b"
        }
      },
      {
        "source": {
          "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
          "port": "c"
        },
        "target": {
          "block": "664caf9e-5f40-4df4-800a-b626af702e62",
          "port": "in"
        }
      }
    ]
  },
  "deps": {},
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  }
}

Cnot project¶

File: cnot.ice

{
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  },
  "board": "icezum",
  "graph": {
    "blocks": [
      {
        "id": "db6b84db-bc29-46d6-86a4-f48cc50c8076",
        "type": "not",
        "data": {},
        "position": {
          "x": 280,
          "y": 248
        }
      },
      {
        "id": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
        "type": "or",
        "data": {},
        "position": {
          "x": 464,
          "y": 136
        }
      },
      {
        "id": "55c6c056-3630-4482-ad47-f4d9ee83b835",
        "type": "basic.input",
        "data": {
          "label": "a",
          "pin": {
            "name": "SW1",
            "value": "10"
          }
        },
        "position": {
          "x": 88,
          "y": 248
        }
      },
      {
        "id": "c8c6eed3-548c-49c7-a162-282179d427b1",
        "type": "basic.output",
        "data": {
          "label": "b",
          "pin": {
            "name": "LED0",
            "value": "95"
          }
        },
        "position": {
          "x": 640,
          "y": 136
        }
      },
      {
        "id": "d2a2eac1-f8b0-4e5b-a693-626f6d14b8e5",
        "type": "low",
        "data": {},
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      }
    ],
    "wires": [
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          "port": "19c8f68d-5022-487f-9ab0-f0a3cd58bead"
        },
        "target": {
          "block": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
          "port": "18c2ebc7-5152-439c-9b3f-851c59bac834"
        }
      },
      {
        "source": {
          "block": "55c6c056-3630-4482-ad47-f4d9ee83b835",
          "port": "out"
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        "target": {
          "block": "db6b84db-bc29-46d6-86a4-f48cc50c8076",
          "port": "18c2ebc7-5152-439c-9b3f-851c59bac834"
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      },
      {
        "source": {
          "block": "db6b84db-bc29-46d6-86a4-f48cc50c8076",
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        "target": {
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          "port": "97b51945-d716-4b6c-9db9-970d08541249"
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      },
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        },
        "target": {
          "block": "c8c6eed3-548c-49c7-a162-282179d427b1",
          "port": "in"
        }
      }
    ]
  },
  "deps": {
    "or": {
      "graph": {
        "blocks": [
          {
            "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
            "type": "basic.input",
            "data": {
              "label": "x"
            },
            "position": {
              "x": 64,
              "y": 80
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          },
          {
            "id": "97b51945-d716-4b6c-9db9-970d08541249",
            "type": "basic.input",
            "data": {
              "label": "y"
            },
            "position": {
              "x": 64,
              "y": 208
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          },
          {
            "id": "664caf9e-5f40-4df4-800a-b626af702e62",
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              "y": 144
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          },
          {
            "id": "00925b04-5004-4307-a737-fa4e97c8b6ab",
            "type": "basic.code",
            "data": {
              "code": "// OR logic gate\n\nassign c = a | b;",
              "ports": {
                "in": [
                  "a",
                  "b"
                ],
                "out": [
                  "c"
                ]
              }
            },
            "position": {
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          }
        ],
        "wires": [
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              "port": "a"
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              "port": "b"
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          },
          {
            "source": {
              "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
              "port": "c"
            },
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              "port": "in"
            }
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        ]
      },
      "deps": {},
      "image": "",
      "state": {
        "pan": {
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    },
    "not": {
      "graph": {
        "blocks": [
          {
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            "type": "basic.input",
            "data": {
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          },
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          },
          {
            "id": "5365ed8c-e5db-4445-938f-8d689830ea5c",
            "type": "basic.code",
            "data": {
              "code": "// NOT logic gate\n\nassign c = ! a;",
              "ports": {
                "in": [
                  "a"
                ],
                "out": [
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        ],
        "wires": [
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            "target": {
              "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
              "port": "a"
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          },
          {
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              "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
              "port": "c"
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              "block": "664caf9e-5f40-4df4-800a-b626af702e62",
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      "state": {
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    },
    "low": {
      "graph": {
        "blocks": [
          {
            "id": "b959fb96-ac67-4aea-90b3-ed35a4c17bf5",
            "type": "basic.code",
            "data": {
              "code": "// Bit 0\n\nassign v = 1'b0;",
              "ports": {
                "in": [],
                "out": [
                  "v"
                ]
              }
            },
            "position": {
              "x": 96,
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          },
          {
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        ],
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          {
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      },
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      "state": {
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    }
  }
}

Dnot project¶

File: dnot.ice

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  "state": {
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    },
    "zoom": 1
  },
  "board": "icezum",
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        }
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      },
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        "type": "basic.output",
        "data": {
          "label": "led1",
          "pin": {
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            "value": "96"
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  "deps": {
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            }
          },
          {
            "id": "5365ed8c-e5db-4445-938f-8d689830ea5c",
            "type": "basic.code",
            "data": {
              "code": "// NOT logic gate\n\nassign c = ! a;",
              "ports": {
                "in": [
                  "a"
                ],
                "out": [
                  "c"
                ]
              }
            },
            "position": {
              "x": 256,
              "y": 48
            }
          }
        ],
        "wires": [
          {
            "source": {
              "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
              "port": "out"
            },
            "target": {
              "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
              "port": "a"
            }
          },
          {
            "source": {
              "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
              "port": "c"
            },
            "target": {
              "block": "664caf9e-5f40-4df4-800a-b626af702e62",
              "port": "in"
            }
          }
        ]
      },
      "deps": {},
      "image": "",
      "state": {
        "pan": {
          "x": 0,
          "y": 0
        },
        "zoom": 1
      }
    }
  }
}

Compiler¶

The JSON structure of a project is a block definition.

Output verilog structure:

Modules
Main module
1. Wires definition
2. Wires connections
3. Blocks instances

Implementation¶

/**
 * @author Jesús Arroyo Torrens <jesus.jkhlg@gmail.com>
 *
 * June 2016
 */

 'use strict';

var fs = require('fs');
var sha1 = require('sha1');


function digestId(id, force) {
  if (id.indexOf('-') != -1) {
    return 'v' + sha1(id).toString().substring(0, 6);
  }
  else {
    return id.replace('.', '_');
  }
  return id;
}

function module(data) {
  var code = '';

  if (data &&
      data.name &&
      data.ports &&
      data.content) {

    // Header

    code += 'module ';
    code += data.name;
    code += ' (';

    var params = [];
    var paramsSpace = 10 + data.name.length;

    for (var i in data.ports.in) {
      params.push('input ' + data.ports.in[i]);
    }
    for (var o in data.ports.out) {
      params.push('output ' + data.ports.out[o]);
    }

    code += params.join(',\n' + new Array(paramsSpace).join(' '));

    code += ');\n';

    // Content

    var content = data.content.split('\n');

    content.forEach(function (element, index, array) {
      array[index] = ' ' + element;
    });

    code += content.join('\n');

    // Footer

    code += '\nendmodule\n\n';
  }

  return code;
}

function getPorts(project) {
  var ports = {
    in: [],
    out: []
  };
  var graph = project.graph;

  for (var i in graph.blocks) {
    var block = graph.blocks[i];
    if (block.type == 'basic.input') {
      ports.in.push(digestId(block.id));
    }
    else if (block.type == 'basic.output') {
      ports.out.push(digestId(block.id));
    }
  }

  return ports;
}

function getContent(name, project) {
  var content = '';
  var graph = project.graph;

  // Wires

  for (var w in graph.wires) {
    content += 'wire w' + w + ';\n'
  }

  // I/O connections

  for (var w in graph.wires) {
    var wire = graph.wires[w];
    for (var i in graph.blocks) {
      var block = graph.blocks[i];
      if (block.type == 'basic.input') {
        if (wire.source.block == block.id) {
          content += 'assign w' + w + ' = ' + digestId(block.id) + ';\n';
        }
      }
      else if (block.type == 'basic.output') {
        if (wire.target.block == block.id) {
          content += 'assign ' + digestId(block.id) + ' = w' + w + ';\n';
        }
      }
    }
  }

  // Wires Connections

  var numWires = graph.wires.length;
  for (var i = 1; i < numWires; i++) {
    for (var j = 0; j < i; j++) {
      var wi = graph.wires[i];
      var wj = graph.wires[j];
      if (wi.source.block == wj.source.block &&
          wi.source.port == wj.source.port) {
        content += 'assign w' + i + ' = w' + j + ';\n';
      }
    }
  }

  // Block instances

  var instances = []
  for (var b in graph.blocks) {
    var block = graph.blocks[b];
    if (block.type != 'basic.input' &&
        block.type != 'basic.output' &&
        block.type != 'basic.info') {

      var id = digestId(block.type, true);
      if (block.type == 'basic.code') {
        id += '_' + digestId(block.id);
      }
      instances.push(name + '_' + id + ' ' + digestId(block.id) + ' (');

      // Parameters

      var params = [];
      var paramsNames = [];
      for (var w in graph.wires) {
        var param = '';
        var paramName = '';
        var wire = graph.wires[w];
        if (block.id == wire.source.block) {
          paramName = digestId(wire.source.port);
        }
        else if (block.id == wire.target.block) {
          paramName = digestId(wire.target.port);
        }
        if (paramName && paramsNames.indexOf(paramName) == -1) {
          paramsNames.push(paramName);
          param += ' .' + paramName;
          param += '(w' + w + ')';
          params.push(param);
        }
      }

      instances.push(params.join(',\n') + '\n);');
    }
  }
  content += instances.join('\n');

  return content;
}

function verilogCompiler(name, project) {
  var code = '';

  if (project &&
      project.graph) {

    // Main module

    if (name) {
      var data = {
        name: name,
        ports: getPorts(project),
        content: getContent(name, project)
      };
      code += module(data);
    }

    // Dependencies modules

    for (var d in project.deps) {
      code += verilogCompiler(name + '_' + digestId(d, true), project.deps[d]);
    }

    // Code modules

    for (var i in project.graph.blocks) {
      var block = project.graph.blocks[i];
      if (block) {
        if (block.type == 'basic.code') {
          var data = {
            name: name + '_' + digestId(block.type, true) + '_' + digestId(block.id),
            ports: block.data.ports,
            content: block.data.code
          }
          code += module(data);
        }
      }
    }
  }

  return code;
}

function pcfCompiler(project) {
  var code = '';

  for (var i in project.graph.blocks) {
    var block = project.graph.blocks[i];
    if (block.type == 'basic.input' ||
        block.type == 'basic.output') {
      code += 'set_io ';
      code += digestId(block.id);
      code += ' ';
      code += block.data.pin.value;
      code += '\n';
    }
  }

  return code;
}

// Examples

var fs = require('fs');

function compare_string(s1, s2) {
  var diff = [];
  var string1 = s1.split(" ");
  var string2 = s2.split(" ");
  var size = Math.max(s1.length, s2.length);

  for(var x = 0; x < size; x++) {
    if(string1[x] != string2[x]) {
      diff.push(string1[x]);
    }
  }

  return diff.join(' ');
}

function test_example(name, extension) {
  var filename = ['..', 'resources', 'examples', name, name].join('/');
  fs.readFile(filename + '.' + extension, 'utf8', function (err, data) {
    if (err) throw err;

    var example = JSON.parse(fs.readFileSync(filename + '.ice'));
    if (extension == 'v') {
      var s1 = verilogCompiler('main', example).replace(/[\r\n]/g, "");
    }
    else {
      var s1 = pcfCompiler(example).replace(/[\r\n]/g, "");
    }
    var s2 = data.replace(/[\r\n]/g, "");

    if (extension == 'v') {
      process.stdout.write('Testing ' + name + ' v   ...');
    }
    else {
      process.stdout.write('Testing ' + name + ' pcf ...');
    }
    if (s1 == s2) {
      process.stdout.write(' [OK]\n');
    }
    else {
      process.stdout.write(' [Fail]\n');
      process.stdout.write(compare_string(s1, s2) + '\n');
    }
  });
}

// Test examples

test_example('low', 'v');
test_example('low', 'pcf');
test_example('not', 'v');
test_example('not', 'pcf');
test_example('or', 'v');
test_example('or', 'pcf');
test_example('cnot', 'v');
test_example('cnot', 'pcf');
test_example('dnot', 'v');
test_example('dnot', 'pcf');

//console.log(verilogCompiler('main', JSON.parse(fs.readFileSync('../resources/examples/dnot/dnot.ice'))));
//console.log(pcfCompiler(JSON.parse(fs.readFileSync('../resources/examples/dnot/dnot.ice'))));

npm install fs sha1

node compiler.js

Examples¶

Low project¶

File: low.ice

{
  "board": "icezum",
  "graph": {
    "blocks": [
      {
        "id": "b959fb96-ac67-4aea-90b3-ed35a4c17bf5",
        "type": "basic.code",
        "data": {
          "code": "// Bit 0\n\nassign v = 1'b0;",
          "ports": {
            "in": [],
            "out": [
              "v"
            ]
          }
        },
        "position": {
          "x": 96,
          "y": 96
        }
      },
      {
        "id": "19c8f68d-5022-487f-9ab0-f0a3cd58bead",
        "type": "basic.output",
        "data": {
          "label": "o",
          "pin": {
            "name": "LED0",
            "value": "95"
          }
        },
        "position": {
          "x": 608,
          "y": 192
        }
      }
    ],
    "wires": [
      {
        "source": {
          "block": "b959fb96-ac67-4aea-90b3-ed35a4c17bf5",
          "port": "v"
        },
        "target": {
          "block": "19c8f68d-5022-487f-9ab0-f0a3cd58bead",
          "port": "in"
        }
      }
    ]
  },
  "deps": {},
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  }
}

Generates

module main (output v608bd9);
 wire w0;
 assign v608bd9 = w0;
 main_basic_code_v68c173 v68c173 (
  .v(w0)
 );
endmodule

module main_basic_code_v68c173 (output v);
 // Bit 0
 
 assign v = 1'b0;
endmodule

set_io v608bd9 95

Not project¶

File: not.ice

{
  "board": "icezum",
  "graph": {
    "blocks": [
      {
        "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
        "type": "basic.input",
        "data": {
          "label": "x",
          "pin": {
            "name": "SW1",
            "value": "10"
          }
        },
        "position": {
          "x": 64,
          "y": 144
        }
      },
      {
        "id": "664caf9e-5f40-4df4-800a-b626af702e62",
        "type": "basic.output",
        "data": {
          "label": "y",
          "pin": {
            "name": "LED0",
            "value": "95"
          }
        },
        "position": {
          "x": 752,
          "y": 144
        }
      },
      {
        "id": "5365ed8c-e5db-4445-938f-8d689830ea5c",
        "type": "basic.code",
        "data": {
          "code": "// NOT logic gate\n\nassign c = ! a;",
          "ports": {
            "in": [
              "a"
            ],
            "out": [
              "c"
            ]
          }
        },
        "position": {
          "x": 256,
          "y": 48
        }
      }
    ],
    "wires": [
      {
        "source": {
          "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
          "port": "out"
        },
        "target": {
          "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
          "port": "a"
        }
      },
      {
        "source": {
          "block": "5365ed8c-e5db-4445-938f-8d689830ea5c",
          "port": "c"
        },
        "target": {
          "block": "664caf9e-5f40-4df4-800a-b626af702e62",
          "port": "in"
        }
      }
    ]
  },
  "deps": {},
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  }
}

Generates

module main (input v0e28cb,
             output vcbab45);
 wire w0;
 wire w1;
 assign w0 = v0e28cb;
 assign vcbab45 = w1;
 main_basic_code_vd54ca1 vd54ca1 (
  .a(w0),
  .c(w1)
 );
endmodule

module main_basic_code_vd54ca1 (input a,
                                output c);
 // NOT logic gate
 
 assign c = ! a;
endmodule

set_io v0e28cb 10
set_io vcbab45 95

Or project¶

File: or.ice

{
  "board": "icezum",
  "graph": {
    "blocks": [
      {
        "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
        "type": "basic.input",
        "data": {
          "label": "x",
          "pin": {
            "name": "SW1",
            "value": "10"
          }
        },
        "position": {
          "x": 64,
          "y": 80
        }
      },
      {
        "id": "97b51945-d716-4b6c-9db9-970d08541249",
        "type": "basic.input",
        "data": {
          "label": "y",
          "pin": {
            "name": "SW2",
            "value": "11"
          }
        },
        "position": {
          "x": 64,
          "y": 208
        }
      },
      {
        "id": "664caf9e-5f40-4df4-800a-b626af702e62",
        "type": "basic.output",
        "data": {
          "label": "o",
          "pin": {
            "name": "LED0",
            "value": "95"
          }
        },
        "position": {
          "x": 752,
          "y": 144
        }
      },
      {
        "id": "00925b04-5004-4307-a737-fa4e97c8b6ab",
        "type": "basic.code",
        "data": {
          "code": "// OR logic gate\n\nassign c = a | b;",
          "ports": {
            "in": [
              "a",
              "b"
            ],
            "out": [
              "c"
            ]
          }
        },
        "position": {
          "x": 256,
          "y": 48
        }
      }
    ],
    "wires": [
      {
        "source": {
          "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
          "port": "out"
        },
        "target": {
          "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
          "port": "a"
        }
      },
      {
        "source": {
          "block": "97b51945-d716-4b6c-9db9-970d08541249",
          "port": "out"
        },
        "target": {
          "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
          "port": "b"
        }
      },
      {
        "source": {
          "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
          "port": "c"
        },
        "target": {
          "block": "664caf9e-5f40-4df4-800a-b626af702e62",
          "port": "in"
        }
      }
    ]
  },
  "deps": {},
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  }
}

Generates

module main (input v0e28cb,
             input v3ca442,
             output vcbab45);
 wire w0;
 wire w1;
 wire w2;
 assign w0 = v0e28cb;
 assign w1 = v3ca442;
 assign vcbab45 = w2;
 main_basic_code_vf4938a vf4938a (
  .a(w0),
  .b(w1),
  .c(w2)
 );
endmodule

module main_basic_code_vf4938a (input a,
                                input b,
                                output c);
 // OR logic gate
 
 assign c = a | b;
endmodule

set_io v0e28cb 10
set_io v3ca442 11
set_io vcbab45 95

Cnot project¶

File: cnot.ice

{
  "image": "",
  "state": {
    "pan": {
      "x": 0,
      "y": 0
    },
    "zoom": 1
  },
  "board": "icezum",
  "graph": {
    "blocks": [
      {
        "id": "db6b84db-bc29-46d6-86a4-f48cc50c8076",
        "type": "not",
        "data": {},
        "position": {
          "x": 280,
          "y": 248
        }
      },
      {
        "id": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
        "type": "or",
        "data": {},
        "position": {
          "x": 464,
          "y": 136
        }
      },
      {
        "id": "55c6c056-3630-4482-ad47-f4d9ee83b835",
        "type": "basic.input",
        "data": {
          "label": "a",
          "pin": {
            "name": "SW1",
            "value": "10"
          }
        },
        "position": {
          "x": 88,
          "y": 248
        }
      },
      {
        "id": "c8c6eed3-548c-49c7-a162-282179d427b1",
        "type": "basic.output",
        "data": {
          "label": "b",
          "pin": {
            "name": "LED0",
            "value": "95"
          }
        },
        "position": {
          "x": 640,
          "y": 136
        }
      },
      {
        "id": "d2a2eac1-f8b0-4e5b-a693-626f6d14b8e5",
        "type": "low",
        "data": {},
        "position": {
          "x": 280,
          "y": 120
        }
      }
    ],
    "wires": [
      {
        "source": {
          "block": "d2a2eac1-f8b0-4e5b-a693-626f6d14b8e5",
          "port": "19c8f68d-5022-487f-9ab0-f0a3cd58bead"
        },
        "target": {
          "block": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
          "port": "18c2ebc7-5152-439c-9b3f-851c59bac834"
        }
      },
      {
        "source": {
          "block": "55c6c056-3630-4482-ad47-f4d9ee83b835",
          "port": "out"
        },
        "target": {
          "block": "db6b84db-bc29-46d6-86a4-f48cc50c8076",
          "port": "18c2ebc7-5152-439c-9b3f-851c59bac834"
        }
      },
      {
        "source": {
          "block": "db6b84db-bc29-46d6-86a4-f48cc50c8076",
          "port": "664caf9e-5f40-4df4-800a-b626af702e62"
        },
        "target": {
          "block": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
          "port": "97b51945-d716-4b6c-9db9-970d08541249"
        }
      },
      {
        "source": {
          "block": "ba7c5fb1-172d-4fa0-8a59-1905c4a71332",
          "port": "664caf9e-5f40-4df4-800a-b626af702e62"
        },
        "target": {
          "block": "c8c6eed3-548c-49c7-a162-282179d427b1",
          "port": "in"
        }
      }
    ]
  },
  "deps": {
    "or": {
      "graph": {
        "blocks": [
          {
            "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
            "type": "basic.input",
            "data": {
              "label": "x"
            },
            "position": {
              "x": 64,
              "y": 80
            }
          },
          {
            "id": "97b51945-d716-4b6c-9db9-970d08541249",
            "type": "basic.input",
            "data": {
              "label": "y"
            },
            "position": {
              "x": 64,
              "y": 208
            }
          },
          {
            "id": "664caf9e-5f40-4df4-800a-b626af702e62",
            "type": "basic.output",
            "data": {
              "label": "o"
            },
            "position": {
              "x": 752,
              "y": 144
            }
          },
          {
            "id": "00925b04-5004-4307-a737-fa4e97c8b6ab",
            "type": "basic.code",
            "data": {
              "code": "// OR logic gate\n\nassign c = a | b;",
              "ports": {
                "in": [
                  "a",
                  "b"
                ],
                "out": [
                  "c"
                ]
              }
            },
            "position": {
              "x": 256,
              "y": 48
            }
          }
        ],
        "wires": [
          {
            "source": {
              "block": "18c2ebc7-5152-439c-9b3f-851c59bac834",
              "port": "out"
            },
            "target": {
              "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
              "port": "a"
            }
          },
          {
            "source": {
              "block": "97b51945-d716-4b6c-9db9-970d08541249",
              "port": "out"
            },
            "target": {
              "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
              "port": "b"
            }
          },
          {
            "source": {
              "block": "00925b04-5004-4307-a737-fa4e97c8b6ab",
              "port": "c"
            },
            "target": {
              "block": "664caf9e-5f40-4df4-800a-b626af702e62",
              "port": "in"
            }
          }
        ]
      },
      "deps": {},
      "image": "",
      "state": {
        "pan": {
          "x": 0,
          "y": 0
        },
        "zoom": 1
      }
    },
    "not": {
      "graph": {
        "blocks": [
          {
            "id": "18c2ebc7-5152-439c-9b3f-851c59bac834",
            "type": "basic.input",
            "data": {
              "label": "x"
            },
            "position": {
              "x": 64,
              "y": 144
            }
          },
          {
            "id": "664caf9e-5f40-4df4-800a-b626af702e62",
            "type": "basic.output",
            "data": {
              "label": "y"
            },
            "position": {
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}

Generates

module main (input va1d1bb,
             output vecf2e3);
 wire w0;
 wire w1;
 wire w2;
 wire w3;
 assign w1 = va1d1bb;
 assign vecf2e3 = w3;
 main_not va44cd3 (
  .v0e28cb(w1),
  .vcbab45(w2)
 );
 main_or v0b7a71 (
  .v0e28cb(w0),
  .v3ca442(w2),
  .vcbab45(w3)
 );
 main_low v2d7478 (
  .v608bd9(w0)
 );
endmodule

module main_or (input v0e28cb,
                input v3ca442,
                output vcbab45);
 wire w0;
 wire w1;
 wire w2;
 assign w0 = v0e28cb;
 assign w1 = v3ca442;
 assign vcbab45 = w2;
 main_or_basic_code_vf4938a vf4938a (
  .a(w0),
  .b(w1),
  .c(w2)
 );
endmodule

module main_or_basic_code_vf4938a (input a,
                                   input b,
                                   output c);
 // OR logic gate
 
 assign c = a | b;
endmodule

module main_not (input v0e28cb,
                 output vcbab45);
 wire w0;
 wire w1;
 assign w0 = v0e28cb;
 assign vcbab45 = w1;
 main_not_basic_code_vd54ca1 vd54ca1 (
  .a(w0),
  .c(w1)
 );
endmodule

module main_not_basic_code_vd54ca1 (input a,
                                    output c);
 // NOT logic gate
 
 assign c = ! a;
endmodule

module main_low (output v608bd9);
 wire w0;
 assign v608bd9 = w0;
 main_low_basic_code_v68c173 v68c173 (
  .v(w0)
 );
endmodule

module main_low_basic_code_v68c173 (output v);
 // Bit 0
 
 assign v = 1'b0;
endmodule

set_io va1d1bb 10
set_io vecf2e3 95

Dnot project¶

File: dnot.ice

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Generates

module main (input v121a14,
             output v31c150,
             output v71e6a9);
 wire w0;
 wire w1;
 wire w2;
 wire w3;
 assign w0 = v121a14;
 assign w1 = v121a14;
 assign v31c150 = w2;
 assign v71e6a9 = w3;
 assign w1 = w0;
 main_cnot vc6f497 (
  .va1d1bb(w1),
  .vecf2e3(w3)
 );
 main_not v59fef8 (
  .v0e28cb(w0),
  .vcbab45(w2)
 );
endmodule

module main_logic_not (input v0e28cb,
                       output vcbab45);
 wire w0;
 wire w1;
 assign w0 = v0e28cb;
 assign vcbab45 = w1;
 main_logic_not_basic_code_vd54ca1 vd54ca1 (
  .a(w0),
  .c(w1)
 );
endmodule

module main_logic_not_basic_code_vd54ca1 (input a,
                                          output c);
 // NOT logic gate
 
 assign c = ~ a;
endmodule

module main_cnot (input va1d1bb,
                  output vecf2e3);
 wire w0;
 wire w1;
 wire w2;
 wire w3;
 assign w1 = va1d1bb;
 assign vecf2e3 = w3;
 main_cnot_not va44cd3 (
  .v0e28cb(w1),
  .vcbab45(w2)
 );
 main_cnot_or v0b7a71 (
  .v0e28cb(w0),
  .v3ca442(w2),
  .vcbab45(w3)
 );
 main_cnot_low v2d7478 (
  .v608bd9(w0)
 );
endmodule

module main_cnot_or (input v0e28cb,
                     input v3ca442,
                     output vcbab45);
 wire w0;
 wire w1;
 wire w2;
 assign w0 = v0e28cb;
 assign w1 = v3ca442;
 assign vcbab45 = w2;
 main_cnot_or_basic_code_vf4938a vf4938a (
  .a(w0),
  .b(w1),
  .c(w2)
 );
endmodule

module main_cnot_or_basic_code_vf4938a (input a,
                                        input b,
                                        output c);
 // OR logic gate
 
 assign c = a | b;
endmodule

module main_cnot_not (input v0e28cb,
                      output vcbab45);
 wire w0;
 wire w1;
 assign w0 = v0e28cb;
 assign vcbab45 = w1;
 main_cnot_not_basic_code_vd54ca1 vd54ca1 (
  .a(w0),
  .c(w1)
 );
endmodule

module main_cnot_not_basic_code_vd54ca1 (input a,
                                         output c);
 // NOT logic gate
 
 assign c = ! a;
endmodule

module main_cnot_low (output v608bd9);
 wire w0;
 assign v608bd9 = w0;
 main_cnot_low_basic_code_v68c173 v68c173 (
  .v(w0)
 );
endmodule

module main_cnot_low_basic_code_v68c173 (output v);
 // Bit 0
 
 assign v = 1'b0;
endmodule

module main_not (input v0e28cb,
                 output vcbab45);
 wire w0;
 wire w1;
 assign w0 = v0e28cb;
 assign vcbab45 = w1;
 main_not_basic_code_vd54ca1 vd54ca1 (
  .a(w0),
  .c(w1)
 );
endmodule

module main_not_basic_code_vd54ca1 (input a,
                                    output c);
 // NOT logic gate
 
 assign c = ! a;
endmodule

set_io v121a14 10
set_io v31c150 95
set_io v71e6a9 96