How to...

Create a project

  1. Create a new project

    Go to Edit > New project, write your project’s name and press OK.

    ../_images/howto-new.png

  1. Add your blocks

  1. Code blocks

    Click on basic > code, add the code ports. Input and output ports are separated by a space. Port names are separated by a comma. E.g.: a,b c.

    This block contains a text editor to write your module verilog code. Module header and footer are not required.

    ../_images/howto-code.png

  1. Info blocks

    Click on basic > info.

    This block contains a text editor to add comments about the project.

    ../_images/howto-info.png

  1. Input/Output blocks

    Click on basic > input or basic > output, write the block’s name and press OK.

    These blocks contain a FPGA pin selector depending on the selected board.

    ../_images/howto-io.png

  1. Bit blocks

    Click on bit > 0 or bit > 1.

    These blocks are low and high logic drivers.

    ../_images/howto-bit.png

  1. Config block

    Click on config > Input-config.

    This block must be connected to input ports in order to configure a pull up.

    ../_images/howto-config.png

  1. Logic blocks

    Go to the logic menu and select a logic gate.

    ../_images/howto-logic.png

  1. Connect your blocks
../_images/howto-bwire.png

../_images/howto-wire.png

  1. Select your board

    Go to Boards menu and select Icezum, iCEstick or Go board.

    ../_images/howto-board.png

  1. Set FPGA I/O pins

    Select all Input/Output blocks’ pins.

    ../_images/howto-fpgapin.png

  1. Save the project

    Go to Edit > Save:

    It will be saved as an .ice file.

    ../_images/howto-save.png

Upload a bitstream

  1. Open a project

    Go to Edit > Open project and select an .ice file.


  2. Verify the project

    Go to Tools > Verify.

    This option checks the generated verilog code using apio verify.

    ../_images/howto-verify.png

  3. Build the project

    Go to Tools > Build.

    This option generates a bitstream using apio build.

    ../_images/howto-build.png

  4. Upload the project

    Connect your FPGA board and press Tools > Upload. This option uses apio upload.

    ../_images/howto-upload.png

Note

If the FPGA toolchain is not installed, it will be installed automatically when any tool is pressed. It can also be installed or removed in the menu Tools section.

../_images/howto-installtoolchain.png

Create a block

  1. Open a project

    Go to Edit > Open project and select an .ice file.


../_images/howto-project.png

  1. Verify the project

    Go to Tools > Verify.


  1. Export the project as a block

    Go to Edit > Export as block.

    It will be saved as an .iceb file.

    ../_images/howto-export.png

Note

Input/Output blocks will become new Block I/O pins.

Use a custom block

  1. Open or create a new project

  1. Import the custom block

    Go to Edit > Import block and select an .iceb file.

    ../_images/howto-import.png

    ../_images/howto-customblock.png

  2. Examine the custom block

    Complex blocks can be examined by double clicking the block.

    ../_images/howto-examine.png

Include a list file

If your code block contains a list file(s), for example:

$readmemh("rom.list", rom);
  1. Save the ice project
  2. Copy the list file(s) in the project directory
  3. Build and upload the project